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mirror of https://github.com/abperiasamy/rtl8812AU_8821AU_linux.git synced 2025-10-19 09:01:10 +02:00

Remove wrong usage of __no_const

This commit is contained in:
Harshavardhana
2015-05-04 12:10:58 -07:00
parent c87881c85b
commit 2bf19d4fe6
2 changed files with 60 additions and 62 deletions

View File

@@ -1,7 +1,7 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
@@ -30,7 +30,7 @@ enum RTL871X_HCI_TYPE {
enum _CHIP_TYPE {
NULL_CHIP_TYPE,
NULL_CHIP_TYPE,
RTL8188C_8192C,
RTL8192D,
RTL8723A,
@@ -96,7 +96,7 @@ typedef enum _HW_VARIABLES{
HW_VAR_INITIAL_GAIN,
HW_VAR_TRIGGER_GPIO_0,
HW_VAR_BT_SET_COEXIST,
HW_VAR_BT_ISSUE_DELBA,
HW_VAR_BT_ISSUE_DELBA,
HW_VAR_CURRENT_ANTENNA,
HW_VAR_ANTENNA_DIVERSITY_LINK,
HW_VAR_ANTENNA_DIVERSITY_SELECT,
@@ -116,7 +116,7 @@ typedef enum _HW_VARIABLES{
HW_VAR_NAV_UPPER,
HW_VAR_C2H_HANDLE,
HW_VAR_RPT_TIMER_SETTING,
HW_VAR_TX_RPT_MAX_MACID,
HW_VAR_TX_RPT_MAX_MACID,
HW_VAR_H2C_MEDIA_STATUS_RPT,
HW_VAR_CHK_HI_QUEUE_EMPTY,
HW_VAR_DL_BCN_SEL,
@@ -148,11 +148,11 @@ typedef enum _HAL_DEF_VARIABLE{
HAL_DEF_TX_PAGE_BOUNDARY,
HAL_DEF_TX_PAGE_BOUNDARY_WOWLAN,
HAL_DEF_ANT_DETECT,//to do for 8723a
}HAL_DEF_VARIABLE;
typedef enum _HAL_ODM_VARIABLE{
HAL_ODM_STA_INFO,
HAL_ODM_STA_INFO,
HAL_ODM_P2P_STATE,
HAL_ODM_WIFI_DISPLAY_STATE,
}HAL_ODM_VARIABLE;
@@ -216,7 +216,7 @@ struct hal_ops {
void (*SetBeaconRelatedRegistersHandler)(_adapter *padapter);
void (*Add_RateATid)(_adapter *padapter, u32 bitmap, u8* arg, u8 rssi_level);
#ifdef CONFIG_CONCURRENT_MODE
#ifdef CONFIG_CONCURRENT_MODE
void (*clone_haldata)(_adapter *dst_padapter, _adapter *src_padapter);
#endif
void (*run_thread)(_adapter *padapter);
@@ -249,10 +249,10 @@ struct hal_ops {
int (*Efuse_PgPacketWrite)(_adapter *padapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest);
u8 (*Efuse_WordEnableDataWrite)(_adapter *padapter, u16 efuse_addr, u8 word_en, u8 *data, BOOLEAN bPseudoTest);
BOOLEAN (*Efuse_PgPacketWrite_BT)(_adapter *padapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest);
#ifdef DBG_CONFIG_ERROR_DETECT
void (*sreset_init_value)(_adapter *padapter);
void (*sreset_reset_value)(_adapter *padapter);
void (*sreset_reset_value)(_adapter *padapter);
void (*silentreset)(_adapter *padapter);
void (*sreset_xmit_status_check)(_adapter *padapter);
void (*sreset_linked_status_check) (_adapter *padapter);
@@ -271,7 +271,7 @@ struct hal_ops {
void (*hal_reset_security_engine)(_adapter * adapter);
s32 (*c2h_handler)(_adapter *padapter, struct c2h_evt_hdr *c2h_evt);
c2h_id_filter c2h_id_filter_ccx;
} __no_const;
};
typedef enum _RT_EEPROM_TYPE{
EEPROM_93C46,
@@ -320,7 +320,7 @@ typedef enum _HARDWARE_TYPE{
HARDWARE_TYPE_RTL8723BE,
HARDWARE_TYPE_RTL8723BU,
HARDWARE_TYPE_RTL8723BS,
HARDWARE_TYPE_MAX,
}HARDWARE_TYPE;
@@ -398,7 +398,7 @@ typedef enum _HARDWARE_TYPE{
#define IS_HARDWARE_TYPE_8723B(_Adapter) \
(IS_HARDWARE_TYPE_8723BE(_Adapter) || IS_HARDWARE_TYPE_8723BU(_Adapter) ||IS_HARDWARE_TYPE_8723BS(_Adapter))
typedef struct eeprom_priv EEPROM_EFUSE_PRIV, *PEEPROM_EFUSE_PRIV;
#define GET_EEPROM_EFUSE_PRIV(adapter) (&adapter->eeprompriv)
#define is_boot_from_eeprom(adapter) (adapter->eeprompriv.EepromOrEfuse)
@@ -461,7 +461,7 @@ u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pVa
void rtw_hal_set_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,BOOLEAN bSet);
void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,BOOLEAN bSet);
void rtw_hal_enable_interrupt(_adapter *padapter);
void rtw_hal_disable_interrupt(_adapter *padapter);
@@ -539,4 +539,3 @@ s32 rtw_hal_c2h_handler(_adapter *adapter, struct c2h_evt_hdr *c2h_evt);
c2h_id_filter rtw_hal_c2h_id_filter_ccx(_adapter *adapter);
#endif //__HAL_INTF_H__

View File

@@ -1,7 +1,7 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
@@ -65,7 +65,7 @@
#define _IO_CMDMASK_ (0x1F80)
/*
/*
For prompt mode accessing, caller shall free io_req
Otherwise, io_handler will free io_req
*/
@@ -142,16 +142,16 @@ struct _io_ops
void (*_read_port_cancel)(struct intf_hdl *pintfhdl);
void (*_write_port_cancel)(struct intf_hdl *pintfhdl);
} __no_const;
struct io_req {
};
struct io_req {
_list list;
u32 addr;
u32 addr;
volatile u32 val;
u32 command;
u32 status;
u8 *pbuf;
u8 *pbuf;
_sema sema;
#ifdef PLATFORM_OS_CE
@@ -160,31 +160,31 @@ struct io_req {
USB_TRANSFER usb_transfer_write_mem;
#endif
#endif
void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt);
u8 *cnxt;
#ifdef PLATFORM_OS_XP
void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt);
u8 *cnxt;
#ifdef PLATFORM_OS_XP
PMDL pmdl;
PIRP pirp;
PIRP pirp;
#ifdef CONFIG_SDIO_HCI
PSDBUS_REQUEST_PACKET sdrp;
#endif
#endif
#endif
#endif
};
struct intf_hdl {
/*
/*
u32 intf_option;
u32 bus_status;
u32 do_flush;
u8 *adapter;
u8 *intf_dev;
u8 *intf_dev;
struct intf_priv *pintfpriv;
u8 cnt;
void (*intf_hdl_init)(u8 *priv);
@@ -194,7 +194,7 @@ struct intf_hdl {
struct _io_ops io_ops;
//u8 intf_status;//moved to struct intf_priv
u16 len;
u16 done_len;
u16 done_len;
*/
_adapter *padapter;
struct dvobj_priv *pintf_dev;// pointer to &(padapter->dvobjpriv);
@@ -205,7 +205,7 @@ struct intf_hdl {
struct reg_protocol_rd {
#ifdef CONFIG_LITTLE_ENDIAN
#ifdef CONFIG_LITTLE_ENDIAN
//DW1
u32 NumOfTrans:4;
@@ -230,22 +230,22 @@ struct reg_protocol_rd {
//DW1
u32 Reserved1 :4;
u32 NumOfTrans :4;
u32 NumOfTrans :4;
u32 Reserved2 :24;
u32 Reserved2 :24;
//DW2
u32 WriteEnable : 1;
u32 ByteCount :7;
u32 ByteCount :7;
u32 Reserved3 : 3;
u32 Byte4Access : 1;
u32 Byte4Access : 1;
u32 Byte2Access : 1;
u32 Byte1Access : 1;
u32 BurstMode :1 ;
u32 FixOrContinuous : 1;
u32 Byte1Access : 1;
u32 BurstMode :1 ;
u32 FixOrContinuous : 1;
u32 Reserved4 : 16;
@@ -256,12 +256,12 @@ struct reg_protocol_rd {
//u32 Value;
#endif
};
struct reg_protocol_wt {
#ifdef CONFIG_LITTLE_ENDIAN
@@ -287,21 +287,21 @@ struct reg_protocol_wt {
#else
//DW1
u32 Reserved1 :4;
u32 NumOfTrans :4;
u32 NumOfTrans :4;
u32 Reserved2 :24;
u32 Reserved2 :24;
//DW2
u32 WriteEnable : 1;
u32 ByteCount :7;
u32 ByteCount :7;
u32 Reserved3 : 3;
u32 Byte4Access : 1;
u32 Byte4Access : 1;
u32 Byte2Access : 1;
u32 Byte1Access : 1;
u32 BurstMode :1 ;
u32 FixOrContinuous : 1;
u32 Byte1Access : 1;
u32 BurstMode :1 ;
u32 FixOrContinuous : 1;
u32 Reserved4 : 16;
@@ -322,10 +322,10 @@ Below is the data structure used by _io_handler
*/
struct io_queue {
_lock lock;
_list free_ioreqs;
_list pending; //The io_req list that will be served in the single protocol read/write.
struct io_queue {
_lock lock;
_list free_ioreqs;
_list pending; //The io_req list that will be served in the single protocol read/write.
_list processing;
u8 *free_ioreqs_buf; // 4-byte aligned
u8 *pallocated_free_ioreqs_buf;
@@ -333,9 +333,9 @@ struct io_queue {
};
struct io_priv{
_adapter *padapter;
_adapter *padapter;
struct intf_hdl intf;
};
@@ -434,9 +434,9 @@ extern int dbg_rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *data, co
extern void rtw_write_scsi(_adapter *adapter, u32 cnt, u8 *pmem);
//ioreq
//ioreq
extern void ioreq_read8(_adapter *adapter, u32 addr, u8 *pval);
extern void ioreq_read16(_adapter *adapter, u32 addr, u16 *pval);
extern void ioreq_read16(_adapter *adapter, u32 addr, u16 *pval);
extern void ioreq_read32(_adapter *adapter, u32 addr, u32 *pval);
extern void ioreq_write8(_adapter *adapter, u32 addr, u8 val);
extern void ioreq_write16(_adapter *adapter, u32 addr, u16 val);
@@ -444,11 +444,11 @@ extern void ioreq_write32(_adapter *adapter, u32 addr, u32 val);
extern uint async_read8(_adapter *adapter, u32 addr, u8 *pbuff,
void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt);
void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt);
extern uint async_read16(_adapter *adapter, u32 addr, u8 *pbuff,
void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt);
void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt);
extern uint async_read32(_adapter *adapter, u32 addr, u8 *pbuff,
void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt);
void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt);
extern void async_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
extern void async_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
@@ -507,4 +507,3 @@ extern void dev_power_down(_adapter * Adapter, u8 bpwrup);
rtw_read32(_a,_b)
#endif //_RTL8711_IO_H_