mirror of
https://github.com/abperiasamy/rtl8812AU_8821AU_linux.git
synced 2025-10-20 09:31:11 +02:00
merge new version v4.3.14 from https://github.com/ptpt52/rtl8812au (#160)
This commit is contained in:
Chen Minqiang
committed by
Harshavardhana
Harshavardhana
parent
c962f7a88d
commit
00aedbde5c
@@ -20,8 +20,7 @@
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#ifndef __RTL8192E_XMIT_H__
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#define __RTL8192E_XMIT_H__
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typedef struct txdescriptor_8192e
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{
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typedef struct txdescriptor_8192e {
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//Offset 0
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u32 pktlen:16;
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u32 offset:8;
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@@ -36,7 +35,7 @@ typedef struct txdescriptor_8192e
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//Offset 4
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u32 macid:6;
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u32 rsvd0406:2;
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u32 rsvd0406:2;
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u32 qsel:5;
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u32 rd_nav_ext:1;
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u32 lsig_txop_en:1;
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@@ -86,7 +85,7 @@ typedef struct txdescriptor_8192e
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u32 cts2self:1;
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u32 rtsen:1;
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u32 hw_rts_en:1;
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u32 port_id:1;
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u32 port_id:1;
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u32 pwr_status:3;
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u32 wait_dcts:1;
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u32 cts2ap_en:1;
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@@ -125,19 +124,9 @@ typedef struct txdescriptor_8192e
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u32 mcsg5_max_len:4;
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u32 mcsg6_max_len:4;
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u32 mcs15_sgi_max_len:4;
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}TXDESC_8192E, *PTXDESC_8192E;
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} TXDESC_8192E, *PTXDESC_8192E;
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//
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// Queue Select Value in TxDesc
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//
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#define QSLT_BK 0x2//0x01
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#define QSLT_BE 0x0
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#define QSLT_VI 0x5//0x4
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#define QSLT_VO 0x7//0x6
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#define QSLT_BEACON 0x10
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#define QSLT_HIGH 0x11
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#define QSLT_MGNT 0x12
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#define QSLT_CMD 0x13
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//For 88e early mode
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#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value)
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@@ -207,16 +196,48 @@ typedef struct txdescriptor_8192e
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#define USB_TXAGG_NUM_SHT 24
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//=====Tx Desc Buffer content
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//=====Desc content
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// config element for each tx buffer
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/*
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#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16), 0, 16, __Valeu)
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#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16), 31, 1, __Valeu)
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#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+4, 0, 32, __Valeu)
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#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+8, 0, 32, __Valeu)
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*/
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#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 0, 16, __Valeu)
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#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 31, 1, __Valeu)
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#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8)+4, 0, 32, __Valeu)
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#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+8, 0, 32, __Valeu)
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// Dword 0
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#define SET_TX_BUFF_DESC_LEN_0_92E(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 14, __Valeu)
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#define SET_TX_BUFF_DESC_PSB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value)
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#define SET_TX_BUFF_DESC_OWN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value)
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// Dword 1
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#define SET_TX_BUFF_DESC_ADDR_LOW_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value)
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#define GET_TX_DESC_TX_BUFFER_ADDRESS_92E(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0,32)
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// Dword 2
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#define SET_TX_BUFF_DESC_ADDR_HIGH_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 32, __Value)
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// Dword 3, RESERVED
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//=====Tx Desc content
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// Dword 0
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#define SET_TX_DESC_PKT_SIZE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value)
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#define SET_TX_DESC_OFFSET_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value)
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#define SET_TX_DESC_BMC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value)
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#define SET_TX_DESC_HTC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value)
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#define SET_TX_DESC_LAST_SEG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value)
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#define SET_TX_DESC_FIRST_SEG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value)
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#define SET_TX_DESC_LINIP_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value)
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#define SET_TX_DESC_NO_ACM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value)
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#define SET_TX_DESC_GF_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value)
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#define SET_TX_DESC_OWN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value)
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#define GET_TX_DESC_OWN_92E(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1)
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// Dword 1
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#define SET_TX_DESC_MACID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value)
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@@ -234,7 +255,7 @@ typedef struct txdescriptor_8192e
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// Dword 2
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#define SET_TX_DESC_PAID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value)
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#define SET_TX_DESC_PAID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value)
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#define SET_TX_DESC_CCA_RTS_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value)
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#define SET_TX_DESC_AGG_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value)
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#define SET_TX_DESC_RDG_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value)
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@@ -324,13 +345,8 @@ typedef struct txdescriptor_8192e
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#define SET_TX_DESC_TXBF_PATH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 11, 1, __Value)
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#define SET_TX_DESC_SEQ_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value)
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#define SET_TX_DESC_FINAL_DATA_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 8, __Value)
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// Dword 10
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#define SET_TX_DESC_TX_BUFFER_ADDRESS_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value)
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// Dword 11
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#define SET_TX_DESC_NEXT_DESC_ADDRESS_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value)
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#define SET_EARLYMODE_PKTNUM_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value)
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#define SET_EARLYMODE_LEN0_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value)
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#define SET_EARLYMODE_LEN1_1_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value)
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@@ -338,9 +354,7 @@ typedef struct txdescriptor_8192e
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#define SET_EARLYMODE_LEN2_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value)
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#define SET_EARLYMODE_LEN3_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value)
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void rtl8192e_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen,u8 IsPsPoll,u8 IsBTQosNull);
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void rtl8192e_cal_txdesc_chksum(u8 *ptxdesc);
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#ifdef CONFIG_USB_HCI
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s32 rtl8192eu_init_xmit_priv(PADAPTER padapter);
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@@ -358,12 +372,27 @@ s32 rtl8192eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv
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s32 rtl8192ee_init_xmit_priv(PADAPTER padapter);
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void rtl8192ee_free_xmit_priv(PADAPTER padapter);
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struct xmit_buf *rtl8192ee_dequeue_xmitbuf(struct rtw_tx_ring *ring);
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s32 rtl8192ee_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
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void rtl8192ee_xmitframe_resume(_adapter *padapter);
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s32 rtl8192ee_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
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s32 rtl8192ee_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
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void rtl8192ee_xmit_tasklet(void *priv);
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#endif
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#if defined(CONFIG_SDIO_HCI)||defined (CONFIG_GSPI_HCI)
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s32 rtl8192es_init_xmit_priv(PADAPTER padapter);
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void rtl8192es_free_xmit_priv(PADAPTER padapter);
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s32 rtl8192es_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
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s32 rtl8192es_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
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s32 rtl8192es_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
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thread_return rtl8192es_xmit_thread(thread_context context);
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s32 rtl8192es_xmit_buf_handler(PADAPTER padapter);
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#ifdef CONFIG_SDIO_TX_TASKLET
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void rtl8192es_xmit_tasklet(void *priv);
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#endif
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#endif
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struct txrpt_ccx_92e {
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/* offset 0 */
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@@ -399,21 +428,21 @@ struct txrpt_ccx_92e {
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u8 sw0;
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};
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#ifdef CONFIG_XMIT_ACK
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void dump_txrpt_ccx_92e(void *buf);
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void handle_txrpt_ccx_92e(_adapter *adapter, u8 *buf);
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#endif //CONFIG_XMIT_ACK
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#ifdef CONFIG_TX_EARLY_MODE
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void UpdateEarlyModeInfo8192E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf );
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#endif
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s32 rtl8192e_init_xmit_priv(_adapter *padapter);
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void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,u8 *ptxdesc);
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u8 BWMapping_92E(PADAPTER Adapter, struct pkt_attrib *pattrib);
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void rtl8192e_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen,
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u8 IsPsPoll,u8 IsBTQosNull, u8 bDataFrame);
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void rtl8192e_cal_txdesc_chksum(u8 *ptxdesc);
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u8 BWMapping_92E(PADAPTER Adapter, struct pkt_attrib *pattrib);
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u8 SCMapping_92E(PADAPTER Adapter, struct pkt_attrib *pattrib);
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void fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc);
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void fill_txdesc_vcs(struct pkt_attrib *pattrib, u8 *ptxdesc);
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void fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc);
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void rtl8192e_fixed_rate(_adapter *padapter,u8 *ptxdesc);
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#endif //__RTL8192E_XMIT_H__
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